Why Two-dimensional Materials?

Moore's law has guided the semiconductor industry for decades. This simple yet profound insight—The number of transistors on a semiconductor chip doubles approximately every 18 to 24 months—has driven remarkable progress in semiconductor technology. Over more than 50 years, semiconductors have achieved advances through scaling, integratons, and cost efficiency. As a result, we now withness the development of highly complex device archituecture, lsuch as  Gate-All-Around FETs, with technology nodes approaching just a few nanometers.

As we push the limits of conventional scaling, we have entered an era of More Moore's law. When scalling reaches its physcial limit, often referred to as the "Atoms cannot scale" stage, the focus shifts towards increasing the integration level. One promising approach involves incorporating TWO-DIMENSIONAL MATERIALS, with their unique properties, into 3D stacking, which holds the potential for the future CMOS production.

In this context, our reseach group is focusing on devloping scalable methods to produce high quaility 2D semiconductor that are compatible with CMOS production, particularly thermal budget and 3D stacking. Additionally, we are eager to persue state-of-the-art device development, such as nanometer-scale devices, Gate-All-Around TFTs, and potentally COMPLEMENTARY FETs. Furthermore, memory devices for neromorphic computing and human-inspired sensory platforms are also key areas of our research interest. The detailed research directions are as follow: